1. Field of the Invention
This invention relates to voltage reference circuits of the band-gap type. More particularly, this invention relates to band-gap circuits suited for use with CMOS integrated-circuit (IC) chips.
2. Description of the Prior Art
Band-gap voltage regulators have been used for a number of years for developing reference voltages which remain substantially constant in the face of temperature variations. Such circuits generally develop a voltage proportional to the difference between base-to-emitter voltages (.DELTA.V.sub.BE) of two transistors operated at different current densities. This voltage will have a positive temperature coefficient (TC), an is combined with a V.sub.BE voltage having a negative TC to provide the output signal which varies only a little with temperature changes. Reissue Pat. RE. No. 30,586 (A. P. Brokaw) shows a particularly advantageous band-gap voltage reference requiring only two transistors.
Band-gap reference circuits have primarily been employed in bipolar ICs. Efforts have been made to adapt such references for CMOS ICs, but significant problems have been encountered in those efforts. As a result, the devices proposed for CMOS have suffered important defects, particularly undue complexity.
One serious problem results from the fact that the .DELTA.V.sub.BE voltage is quite small (e.g. less than 100 mV), so that it must be amplified quite a bit to reach a value suitable for reference purposes. Such amplification is inherent in a band-gap circuit such as shown in U.S. Pat. No. 30,586 referred to above, because the .DELTA.V.sub.BE signal is taken from the collectors of the two transistors. In a CMOS chip made by the usual processes, however, the bipolar transistors available for voltage reference purposes are parasitic transistors, the collectors of which cannot be independently accessed for voltage sensing purposes. In such devices, therefore, the .DELTA.V.sub.BE voltage will not automatically be amplified by the transistors from which it is developed.
Moreover, the MOS amplifiers on a CMOS chip have relatively large offset voltages, so that the offset after substantial amplification will show up as a large error compared to the .DELTA.V.sub.BE signal component. For example, to develop a reference voltage of around 5 volts, a 20 mV offset in an amplifier (or comparator) could show up as a 0.5 volt error referred to output or threshold.
U.S. Pat. No. 4,622,512 (Brokaw) shows an arrangement for multiplying the V.sub.BE of each of two transistors having different current densities by connecting resistor-string V.sub.BE multipliers to each of the two transistors. This is an effective approach to the problem, but is not fully satisfactory for all applications.